Vicor ZVS Buck Regulators

Vicor ZVS Buck Regulators offer maximum power density and flexibility for high-efficiency point-of-load DC-DC regulation. Point-of-load performance is increased by integrating a high-performance Zero-Voltage Switching (ZVS) topology and provides best-in-class power efficiency of up to 98%. Vicor ZVS regulators are highly integrated with control circuitry, power semiconductors, and support components in a high-density LGA System in Package (SIP).

Power delivery can be further increased by inter-leaving multiple buck regulators using single wire current sharing. Using a ZVS topology enables high-frequency operation that maximizes efficiency by minimizing the significant switching losses associated with conventional buck regulators using hard-switching topologies.

The high switching frequency of the ZVS Regulators also reduces the size of the external filtering components, improving power density while enabling fast dynamic response to line and load transients. These regulators sustain high switching frequency up to the rated input voltage without sacrificing efficiency and, with its 20ns minimum on-time, supports step-down conversion for input voltages up to 60V. The ZVS series offers buck regulators for 12VIN, 24VIN, and 48VIN nominal systems.

Features

  • Wide Input Operating Ranges:
    • 12VIN nominal (8-18VIN)
    • 24VIN nominal (8-36VIN)
    • 48VIN nominal (34-60VIN)
    • -40°C to 125°C temperature operating range
  • Simple to Use; Fast Development Time:
    • Internal compensation - few external components
    • No additional design or additional settings required
  • High Efficiency:
    • 96% peak 48VIN to 23VOUT
    • >96% peak 24VIN to 5VOUT
    • >95% peak 12VIN to 5VOUT
    • Light load and full load high-efficiency performance
  • Flexible and Rich Feature Set:
    • Paralleling and single wire current sharing
    • Frequency synchronization
    • User-adjustable soft-start & tracking
    • PI33xx optional I2C telemetry & functionality
      • VOUT margining
      • Fault reporting
      • Enable and SYNCI pin polarity
      • Phase delay (for interleaving multiple regulators)
    • High-Density Packaging Platform:
      • 10x14x2.5mm SiP LGA
      • 10x10x2.5mm SiP LGA
Veröffentlichungsdatum: 2015-06-16 | Aktualisiert: 2025-01-07